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q2d series ? quarter - brick dc/dc converter 48v input data sheet dual output rev. nov 13 , 2002 page 1 of 14 applications distributed power architectures telecommunications equipment lan/wan applications data processing applications features independent outputs of any combination of voltages from 1.2v to 5.0v simultaneously delivers 15a per output from 1. 2v to 3.3v; 10a for 5v output extremely low - profile (<8mm or 0.30?) single - board design. no heatsink required. light weight: 28 g ( 1.00 oz) surface mount and through - hole versions high efficiency no minimum load required on either output starts - up into pre - biased outputs meets transient withstand requirements of bellcore gr - 513 fixed frequency operation remote on/off (primary referenced), positive or negative logic output voltage trim. 10% for each output output overcurrent protection output overvolta ge protection overtemperature protection description the new q2d series of dual output dc/dc converters offer unprecedented density and performance in an industry standard, quarter - brick footprint. patent pending technology and state - of - the - art packaging techniques achieve a total of 30a (25a for 5v output) output current, 15a (10a for 5v output) per channel, without a heatsink. extremely low profile (<8mm or 0.30?) enables the converters to be used in applications where spacing between circuit boards is limited. the 100% surface - mount design provides consistent high quality and reliability. the smt mounting option eliminates the need for separate (additional manual) process in attaching the converters to the motherboards during mass production. loc ation of the thermocouple for thermal testing.
q2d series ? quarter - brick dc/dc converter 48v input data sheet dual output rev. nov 13 , 2002 page 2 of 14 part numbering guide base model selection guide model input voltage range, vdc output voltage, vout 2 vdc output voltage, vout 1 vdc output current, output 2 adc output current, output 1 adc q2d25zge 36 - 75 5.0 3.3 10 15 q2d25zgd 36 - 75 5.0 2.5 10 15 q2d25zgb 36 - 75 5.0 1.8 10 15 q2d30zed 36 - 75 3.3 2.5 15 15 q2d30zeb 36 - 75 3.3 1.8 15 15 q2d30zey 36 - 75 3.3 1.2 15 15 q2d30zdb 36 - 75 2.5 1.8 15 15 height, clearance and pin options for thro ugh hole ver s ions ht (maximum height) cl (minimum clearance) pl pin length height option +0.000 [+0.00] - 0.038 [ - 0.97] +0.030 [+0.77] - 0.000 [ - 0.00] pin option 0.005 [0.13] blank 0.303 [7.69] 0.030 [ 0.77] 0.188 [4.77] c2 0.336 [8.53] 0.063 [1.600] 7 0.145 [3.68] c3 0.400 [10.16] 0.127 [3.23] 8 0.110 [2.79] c4 0.500 [12.70] 0.227 [5.77] product series output current input voltage ou t put vol t age 2 ou t put vol t age 1 on/off logic surface mount pin length height option q2d 25 z g e - n m6 c2 g = 5.0vdc e = 3.3vdc d = 2.5vdc e = 3.3vdc d = 2.5vdc b = 1.8vdc y = 1.2vdc n t neg a tive (blank) t pos i tive m6 t surface mount (blank) t through hole blank t 0.188? 7 t 0.145? 8 t 0.110? not valid w /m6 option see chart below not valid w/m6 option dual qua r ter - brick format vout2 = 5v, iout = 25a vout2<5v iout = 30a 48vin nom.
q2d series ? quarter - brick dc/dc converter 48v input data sheet dual output rev. nov 13 , 2002 page 3 of 14 absolute maximum ratings stresses in excess of the absolute maximum ratings may cause performance degradation, adversely effect long - term reliability, and cause permanent damage to the converter. parameter conditions/description min max units input voltage operating input voltage transient, 100 ms 0 80 100 vdc vdc pcb operating temperature at 100% load - 40 100 c storage temperature - 40 125 c on/off control voltage referenced to - vin - 1 13.5 vdc environmental and mechanical specifications all specifications apply over specified input voltage, output load, and temperature range, unless otherwise noted. parameter conditions/descr iption min nom max units vibration halfsine wave, 10 - 55 hz, 3 axes, 5 min each 5 g weight 1.0/28 oz/g water washing standard process yes mtbf telcordia tr - 332 method i case 1 2.6 mhrs isolation specifications all specifications apply over specified input voltage, output load, and temperature range, unless otherwise noted. parameter conditions/description min nom max units insulation safety rating basic isolation voltage 2000 vdc isolation resistance 10 m w isolation capacitance 1.3 nf input specifications all specifications apply over specified input voltage, output load and temperature range, unless otherwise noted. parameter conditions/description min nom max units input voltage continuous 36 48 75 vdc turn - on input vo ltage ramping up 33 34 35 vdc turn - off input voltage ramping down 31 32 33 vdc turn - on time to output regulation band 100% resistive load 3 ms input reflected ripple current full load, 12uh source inductance 6 ma p - p input inrush current limit vi n = vin max 1 a 2 s
q2d series ? quarter - brick dc/dc converter 48v input data sheet dual output rev. nov 13 , 2002 page 4 of 14 output specifications all specifications apply over specified input voltage, output load and temperature range, unless otherwise noted. parameter conditions/description min nom max units output voltage setpoint accuracy vin = vi n nom, full load - 1.5 +1.5 %vout output current* vout1 0 15 adc output current* vout2 0 15 10a if vo2= 5.0 adc line regulation vout1 vin.min to vin max, iout max +/ - 2 mv line regulation vout2 vin min to vin max, iout max +/ - 2 mv load regulati on, vout1 vin = vnom, iout min to iout max - 10 mv load regulation, vout2 vin = vnom, iout min to iout max - 10 mv dynamic regulation peak deviation settling time 50 - 75% load step change to 1% error band 40 60 mv m s admissible load capacitanc e iout max, nom vin 10,000 m f output current limit threshold** vout =0.97vout nom 110 160 %iout switching frequency 435 khz overvoltage protection, non latching over all input voltage and load conditions 115 140 %vout trim range iout max, vin = vnom 90 110 %vout ** overcurrent protection is non - latching w ith auto - recovery. feature specifications all specifications apply over specified input voltage, output load, and temperature range, unless otherwise noted. parameter conditions/description min nom max units shutdown (on/off) negative logic converte r on converter off positive logic converter on converter off on/off signal is low ? converter is on on/off pin is connected to - vin on/off signal is low ? converter is off on/off pin is connected to - vin - 20 2.4 2.4 - 20 0. 8 20 20 0.8 vdc vdc vdc vdc vdc vdc madc overtemperature protection pcb temperature 120 c
q2d series ? quarter - brick dc/dc converter 48v input data sheet dual output rev. nov 13 , 2002 page 5 of 14 start - up information (using negative on/off) scenario #1: initial start - up from bulk supply on/off function enabled, converter started via applic a tio n of v in . see figure 1. time comments t 0 on/off pin is on; system front end power is to g gled on, v in to converter begins to rise. t 1 v in crosses under - voltage lockout protection ci r cuit threshold; converter enabled. t 2 converter begins to respond to t urn - on co m mand (converter turn - on delay). t 3 output voltage v out 1 reaches 100% of nominal value. t 4 output voltage v out 2 reaches 100% of nom i nal value. for this example, the total converter start - up time (t 4 - t 1 ) is typ i cally 3 ms. scenario #2: initi al start - up using on/off pin with v in previously powered, converter started via on/off pin. see figure 2. time comments t 0 v input at nominal value. t 1 arbitrary time when on/off pin is enabled (co n verter enabled). t 2 end of converter turn - on delay. t 3 output voltage v out 1 reaches 100% of nominal value. t 4 output voltage v out 2 reaches 100% of nominal value. for this example, the total converter start - up time (t 4 - t 1 ) is typ i cally 3 ms. scenario #3: turn - off and restart using on/off pin with v in previously powered, converter is disabled and then e n abled via on/off pin. see figure 3. time comments t 0 v in and v out are at nominal values; on/off pin on. t 1 on/off pin arbitrarily disabled; converter ou t puts fall to zero; turn - on inhibit delay perio d (100 ms typ i cal) is initiated, and on/off pin action is inte r nally inhibited. t 2 on/off pin is externally re - enabled. if (t 2 - t 1 ) = 100 ms , external action of on/off pin is locked out by start - up inhibit timer. if (t 2 - t 1 ) > 100 ms , on/off pin action i s inte r nally e n abled. t 3 turn - on inhibit delay period ends. if on/off pin is on, converter begins turn - on; if off, converter awaits on/off pin on signal; see figure 6. t 4 end of converter turn - on delay. t 5 output voltage v out 1 reaches 100% of nominal va lue. t 6 output voltage v out 2 reaches 100% of nominal value. for the condition, (t 2 - t 1 ) = 100 ms , the total co n verter start - up time (t 6 - t 2 ) is typically 103 ms. for (t 2 - t 1 ) > 100 ms , start - up time will be typ i cally 3 ms after release of on/off pin. v out 1 t 4 v out 1 v out 2 v in on/off state v out 2 t 0 t 1 t 2 t 3 on off fig. 1. start - up sc e nario #1 v out 1 v out 2 v out 1 v out 2 t 4 t 3 on/off state t 0 t 1 t 2 on off v in fig. 2. start - up sc e nario #2 t 6 v out 1 v out 2 v out 2 v out 1 on/off state off on t 0 t 2 t 1 t 5 v in t 4 t 3 100 ms fig. 3. start - up sc e nario #3
q2d series ? quarter - brick dc/dc converter 48v input data sheet dual output rev. nov 13 , 2002 page 6 of 14 characteristic curves load current iout1 = 1.5iout2 [adc] 0 2 4 6 8 10 12 14 16 efficiency 0.65 0.70 0.75 0.80 0.85 0.90 0.95 72 v 48 v 36 v fig. 4 . q2d25 zge (5.0v/3.3v), balanced load load current iout1 = iout2 [adc] 0 2 4 6 8 10 12 14 16 efficiency 0.65 0.70 0.75 0.80 0.85 0.90 0.95 72 v 48 v 36 v fig. 5 . q2d30zed (3.3v/2.5v), balanced load load current iout1 = iout2 [adc] 0 2 4 6 8 10 12 14 16 efficiency 0.65 0.70 0.75 0.80 0.85 0.90 0.95 72 v 48 v 36 v fig. 6 . q2d30zeb ( 3.3v/1.8v), balanced load load current iout1 = 1.5iout2 [adc] 0 2 4 6 8 10 12 14 16 efficiency 0.65 0.70 0.75 0.80 0.85 0.90 0.95 72 v 48 v 36 v fig. 7 . q2d25zgd (5.0v/2.5v), balanced load load current iout1 = 1.5iout2 [adc] 0 2 4 6 8 10 12 14 16 efficiency 0.65 0.70 0.75 0.80 0.85 0.90 0.95 72 v 48 v 36 v fig. 8 . q2d25zgb (5.0v/1.8v), balanced load load current iout1 = 1.5iout2 [adc] 0 2 4 6 8 10 12 14 16 efficiency 0.65 0.70 0.75 0.80 0.85 0.90 0.95 72 v 48 v 36 v fig. 9 . q2d25zdb (2.5v/ 1.8v), balanced load
q2d series ? quarter - brick dc/dc converter 48v input data sheet dual output rev. nov 13 , 2002 page 7 of 14 load current iout1 = iout2 [adc] 0 2 4 6 8 10 12 14 16 efficiency 0.65 0.70 0.75 0.80 0.85 0.90 0.95 72 v 48 v 36 v fig. 10 . q2d30zey (3.3v/1.2v), balanced load
q2d series ? quarter - brick dc/dc converter 48v input data sheet dual output rev. nov 13 , 2002 page 8 of 14 application input and output impedance these power converters have been designed to be stable with no external capacitors when used in low inductance i n put and output circuits. however, in many applications, the inductance associated with the distribution from the power source to the input of the converter can affect the stability of the converter. the add i tion of a 33 f electrolytic capacitor with an esr < 1 w across the input helps ensure stability of the converter. in many applications, the user has to use decoupling capac i tance at the load. the converter will exhibit stable operation with external load capacitance up to 10,000 f on 3.3 v and 4,700 uf on 5 v ou t put. on/off (pin 2) the on/off pin is used to turn the power converter on or off remotely via a system signal. there are two remote co n trol options available, positive logic and negative logic and both are referenced to vin( - ). typical con nections are shown in fi g . 11. rload1 control nput rload2 vin vin (+) vin (-) on/off vout2 (+) trim rtn vout1 (+) q tm series converter (top view) fig. 11. circuit configuration for on/off function the positive logic version turns on when the on/off pin is at logic high and turns off when at logic low. the converter is on when the on/off pin is left open . the nega tive logic version turns on when the pin is at logic low and turns off when the pin is at logic high. the on/off pin can be hard wired directly to vin( - ) to enable automatic power up of the converter without the need of an external control si g nal. a mecha nical switch, open collector transistor, or fet can be used to drive the input of the on/off pin. the device must be capable of sinking up to 0.2 ma at a low level vol t age of 0.8 v, and sourcing up to 0.5 ma at high logic level of 5 v; higher current ca pability is required for control vol t ages greater than 5 v. see the start - up information section for system timing waveforms ass o ciated with use of the on/off pin. output voltage adjust /trim (pin 6) the converter?s output voltages can be adjusted simult an e ously up 10% or down 10% relative to the rated output vol t ages by the addition of an externally connected resi s tor. the trim pin should be left open if trimming is not being used. to minimize noise pickup, a 0.1 f capacitor is co n nected internally bet wee n the trim and return pins. rload1 rload2 vin vin (+) vin (-) on/off vout2 (+) trim rtn r t-incr vout1 (+) q tm series converter (top view) fig. 12. configuration for increasing output voltage to increase the output voltage (refer to fig. 12), a trim resi s tor, r t - incr , should be connected between the trim (pin 6) and return (pin 5), with a value from the ta ble s below. rload1 rload2 vin vin (+) vin (-) on/off vout1 (+) trim rtn r t-decr vout2 (+) q tm series converter (top view) fig. 13 a . configuration for decreasing output voltage to decrease the output voltage, a trim resistor r t - decr , (fig. 13 a ) should be connected between the trim (pin 6) and vout1(+) pin (pin 4), with a value from the table s b e low, where: ? = percentage of increase or decrease vout(nom).
q2d series ? quarter - brick dc/dc converter 48v input data sheet dual output rev. nov 13 , 2002 page 9 of 14 models using the trim configuration shown in figure 13a include: q2d25zge, q2d25zgb, q2d30zed. rload1 rload2 vin vin (+) vin (-) on/off vout1 (+) trim rtn vout2 (+) q tm series converter (top view) r t-decr fig. 13b. configuration for decreasing output voltage to decrease the output voltage, a trim resistor r t - dec r , (fig. 13b) should be connected b e tween the trim (pin 6) and vout2(+) pin (pin 7), with a value from the table b e low, where: ? = percentage of increase or decrease vout(nom). models using the trim configuration shown in figure 13b include: q2d30zeb, q2d30zey, q2d30zdb, q2d30zba. note 1: both outputs are trimmed up or down simultan e ously. trim resistor (vout i n crease) ? [%] r t - i ncr [ko] 1 5 4. 9 2 2 4 . 9 3 1 4 . 3 4 9 . 31 5 6 . 34 6 4 . 32 7 2. 80 8 1. 69 9 0. 825 10 0 trim resi s tor (vout d e crease) ? [%] r t - decr [ko] - 1 68 . 1 - 2 30 . 1 - 3 1 7 . 8 - 4 11 . 5 - 5 7 . 68 - 6 5 . 36 - 7 3 . 48 - 8 2 . 1 0 - 9 1 . 05 - 10 0 table a. use for models: q2d25zge, q2d25zgb, q2d30zeb, q2d30zey . trim resistor (vout i n crease) ? [%] r t - incr [ko] 1 46.4 2 20.5 3 12.1 4 8.06 5 5.23 6 3.57 7 2.21 8 1.30 9 0.604 10 0 trim resi s tor (vout d e crease) ? [%] r t - decr [ko] - 1 57.6 - 2 25.5 - 3 14.0 - 4 8.87 - 5 5.90 - 6 3.83 - 7 2.32 - 8 1.30 - 9 0.432 - 10 0 table b. use for models: q2d30zed, q2d30zdb trim resistor (vout i n crease) ? [%] r t - incr [ko] 1 60.4 2 29.4 3 19.6 4 14.3 5 11.3 6 9.31 7 7.87 8 6.81 9 5.90 10 5.23 trim resi s tor ( vout d e crease) ? [%] r t - decr [ko] - 1 28.7 - 2 13.3 - 3 8.45 - 4 5.90 - 5 4.32 - 6 3.40 - 7 2.67 - 8 2 . 1 0 - 9 1.69 - 10 1.37 table c. use for models q2d30zba note 2: the above trim resistor values match those typically used in industry - standard dual qu a r ter bricks. input under - v oltage lockout input under - voltage lockout is standard with this converter. the converter will shut down when the input voltage drops b e low a pre determined voltage. the in put voltage must be at least 35 v for the converter to turn on. once the converter has been turned on, it will shut off when t he input voltage drops below 31 v. this feature is beneficial in preventing deep discharging of batteries used in telecom applic a tions.
q2d series ? quarter - brick dc/dc converter 48v input data sheet dual output rev. nov 13 , 2002 page 10 of 14 output over - c urrent protection (ocp) the con verter is protected against over - current or short ci r cuit conditions on both outputs. upon sensing an over - current condition, the converter will switch to constant cu r rent operation and thereby begin to reduce output vol t ages. if, due to current limit, t he output voltage vout1 (3.3 v) drops, than vout2 (5.0 v) wil l follow vout1 with less than 1 v difference. drop on vout2 output due to current limit will not affect voltage on vout1. for further load increase , if either vout1 drops below 1 vdc or vout2 d rops below 2 vdc, the co n verter will shut down. once the converter has shut down, it will attempt to restart nominally every 100 ms with a 2% duty cycle. the attempted restart will continue indefinitely until the overload or short circuit conditions are re moved or the output vol t age vout1 rises above 1 vdc and vout2 above 2 vdc. output over - voltage protection (ovp) the converter will shut down if the output voltage across e i ther vout1(+) (pin 4) or vout2(+) (pin 7) and return (pin 5) exceeds the threshold of the ovp circuitry. the ovp pr o tection is separate for vout1 and vout2 with their own refe r ence independent of the output voltage regulation loops. once the converter has shut down, it wi ll attempt to restart every 100 ms until the ovp condition is r e mo ved. over - temperature protection (otp) the converter will shut down under an over - temperature condition to protect itself from overheating caused by oper a tion outside the thermal derating curves, or operation in a b normal cond i tions such as system fan fai lure. the over - temperature protection circuit turns the converter off when the temperature at a sensed location reaches 120c (typical). once the converter has shut down, it will restart when the temperature at the sensed location falls b e low 110c. safe ty requirements the converters meet north american and international safety regulatory requirements per ul60950 and en60950. basic insulation is provided between i n put and output. to comply with safety agencies requirements, an input line fuse must be use d external to the converter. a 5 - a fuse is reco m mended for use with this product. electromagnetic compatibility (emc) emc requirements must be met at the end - product system level, as no specific standards dedicated to emc characte r istics of board mounted component dc/dc converters exist. however, power - one tests its converters to several system level standards, primary of which is the more stringent en55022, information technology equipment - radio disturbance cha r acteristics - limits and methods of mea s u rement. with the addition of a simple external filter (see application notes), all versions of the q 2 d family of converters pass the requirements of class b conducted emissions per en55022 and fcc, and meet at a minimum, class a rad i ated emi s sions per en 55022 and class b per fcc title 47cfr, part 15 - j. please contact power - one app lications eng i neering for testing details. thermal considerations the q2d series converters are designed for natural or forced convection cooling. the maximum available out put power of the converters is determined by the maximum semiconductor junction temperature. to provide reliable long - term operation of the converters, power - one limits maximum allowable junction temperature to 120c. the graphs in figures 14 - 20 show the maximum output current of the q2d series converters at different local ambient temperatures at both natural and forced (longitudinal airflow direction, from pin 3 to pin 4) convection.
q2d series ? quarter - brick dc/dc converter 48v input data sheet dual output rev. nov 13 , 2002 page 11 of 14 iout1=iout2 for all derating curves. ambient temperature [c] 20 30 40 50 60 70 80 90 % of max. load current iout1, iout2 0 10 20 30 40 50 60 70 80 90 100 110 120 500 lfm (2.5 m/s) 400 lfm (2.0 m/s) 300 lfm (1.5 m/s) 200 lfm (1.0 m/s) 100 lfm (0.5 m/s) 0 lfm (0 m/s) fig.14 . q2d25zge (5.0v/3.3v) derating curves ambient temperature [c] 20 30 40 50 60 70 80 90 load current iout1, iout2 [adc] 0.0 2.5 5.0 7.5 10.0 12.5 15.0 17.5 20.0 500 lfm (2.5 m/s) 400 lfm (2.0 m/s) 300 lfm (1.5 m/s) 200 lfm (1.0 m/s) 100 lfm (0.5 m/s) 0 lfm (0 m/s) fig.15 . q2d25zgd (5.0v/2.5v) derating curves ambient temperature [c] 20 30 40 50 60 70 80 90 total output power [w] 0 10 20 30 40 50 60 70 80 90 100 500 lfm (2.5 m/s) 400 lfm (2.0 m/s) 300 lfm (1.5 m/s) 200 lfm (1.0 m/s) 100 lfm (0.5 m/s) 0 lfm (0 m/s) fig.16 . q2d25zgb (5.0v/1.8v) derating curves ambient temperature [c] 20 30 40 50 60 70 80 90 load current iout1, iout2 [adc] 0.0 2.5 5.0 7.5 10.0 12.5 15.0 17.5 20.0 500 lfm (2.5 m/s) 400 lfm (2.0 m/s) 300 lfm (1.5 m/s) 200 lfm (1.0 m/s) 100 lfm (0.5 m/s) 0 lfm (0 m/s) fig.17 . q2d30zed (3.3v/2.5v) derating curves ambient temperature [c] 20 30 40 50 60 70 80 90 load current iout1, iout2 [adc] 0.0 2.5 5.0 7.5 10.0 12.5 15.0 17.5 20.0 500 lfm (2.5 m/s) 400 lfm (2.0 m/s) 300 lfm (1.5 m/s) 200 lfm (1.0 m/s) 100 lfm (0.5 m/s) 0 lfm (0 m/s) fig.18 . q2d30 zeb (3.3v/1.8v) derating curves ambient temperature [c] 20 30 40 50 60 70 80 90 load current iout1, iout2 [adc] 0.0 2.5 5.0 7.5 10.0 12.5 15.0 17.5 20.0 500 lfm (2.5 m/s) 400 lfm (2.0 m/s) 300 lfm (1.5 m/s) 200 lfm (1.0 m/s) 100 lfm (0.5 m/s) 0 lfm (0 m/s) fig.19 . q2d30zdb (2.5v/1.8v) derating curves
q2d series ? quarter - brick dc/dc converter 48v input data sheet dual output rev. nov 13 , 2002 page 12 of 14 ambient temperature [c] 20 30 40 50 60 70 80 90 load current iout1, iout2 [adc] 0.0 2.5 5.0 7.5 10.0 12.5 15.0 17.5 20.0 500 lfm (2.5 m/s) 400 lfm (2.0 m/s) 300 lfm (1.5 m/s) 200 lfm (1.0 m/s) 100 lfm (0.5 m/s) 0 lfm (0 m/s) fig.20 . q2d30zey (3.3v/1.2v) derating curve s
q2d series ? quarter - brick dc/dc converter 48v input data sheet dual output rev. nov 13 , 2002 page 13 of 14 physical information (through - hole option) side view 1 2 7 bottom view 3 4 6 5 pin connections pin # function 1 vin (+) 2 on/off 3 vin ( - ) 4 vout1 (+) 5 rtn [vout1( - ) and vout2( - )] 6 trim 7 vout2 (+) ht (maximum height) cl (minimum clearance) pl pin length height option +0.000 [+0.00] - 0.038 [ - 0.97] +0.030 [+0.77] - 0.000 [ - 0.00] pin option 0.005 [0.13] blank 0.303 [7.69] 0.030 [ 0.77] 0.188 [4.77] c2 0.336 [8.53] 0.063 [1.600] 7 0.145 [3.68] c3 0.400 [10.16] 0.127 [3.23] 8 0.110 [2.79] c4 0.500 [12.70] 0.227 [5.77] all dimensions are in inches [mm] all pins are ? 0.040?[1.02] with ? 0.078? [1.98] shoulder pin material: brass pin finish: tin/lead over nickel converter weight: 0.90 oz. [25.5 g]
q2d series ? quarter - brick dc/dc converter 48v input data sheet dual output rev. nov 13 , 2002 page 14 of 14 physical information (surface mount option) side view bottom view 2 6 3 1 7 5 4 notes 1. consult factory for the complete list of available options. 2. power - one products are not authorized for use as critical components in life support systems, equipment used in hazardous environments, or nuclear control systems without the ex press written consent of the respective divisional president of power - one, inc. 3. the appearance of products, including safety agency certifications pictured on labels, may change depending on the date manufactured. specifications are subject to change with out notice. 4. valid output voltage combinations vout2 vout1 (given vout2 listed below are the vout1 possibilities) 5.0v 3,3, 2.5, 1.8 3.3v 2.5, 1.8, 1.2 2.5v 1.8 pin connections pin # function 1 vin (+) 2 on/off 3 vin ( - ) 4 vout1 (+) 5 rtn [vout1( - ) and vout2( - )] 6 trim 7 vout2 (+) all dimensions are in inches [mm] connector material: copper connector finish: gold over nickel converter weight: 0.90 oz. [25.5 g] recommended surface - mount pads: min. 0.080? x 0.112? [2.03 x 2.84] max. 0.092? x 0.124? [2.34 x 3.15]

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